VLSI Architecture & Systems Design Research Laboratory - MiNT-SRC

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VLSI Architecture & Systems Design Research Laboratory - MiNT-SRC VASYD in Microelectronic and Nanotechnology – Shamsuddin Research Centre (MiNT-SRC) was establishe

VASYD in Microelectronic and Nanotechnology – Shamsuddin Research Centre (MiNT-SRC) was established to investigate various aspects of very large scale integration (VLSI) circuits and systems design. Research activities include:
Reconfigurable Digital Systems:
This investigation involves design and implementation of reconfigurable hardware that is suitable for field programmable gate array (FPGA)

and digital signal processing (DSP) applications. Energy Efficient Digital Systems:
This is an on-going exploration in which techniques are being developed for lowering power dissipation in digital systems without drastically affecting performance. With the growing popularity of battery powered portable applications like personal communication systems, mobile computing, energy efficient, high performance circuits are gaining importance. Investigation is being carried out for lowering dynamic as well as leakage power dissipation in custom and reconfigurable circuits and systems. Applications:
Three-dimensional (3-D) medical image processing, compression in tele-radiology, segmentation and registration for tumour definition, radiation therapy planning and cancer diagnosis, de-noising for multimodalities, face recognition for security and video surveillance, hardware-software co-design for automotive and aviation industry, real-time dynamic monitoring for agriculture sector.

20/10/2017

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Reconfigurable Computing for Analytic Acceleration (ReCAA) Research Laboratory in Microelectronic and Nanotechnology – Shamsuddin Research Centre (MiNT-SRC) was established to investigate various aspects of reconfigurable computing towards analytic acce

21/01/2016

Current research topics in our lab:

PhD #01:
Quantification and Segmentation of Breast Cancer Diagnosis: An Efficient Hardware Accelerator Approach

PhD #02:
Efficient Architecture of Heterogeneous FPGA-GPU for 3-D Medical Image Compression

PhD #03:
Efficient Reconfigurable Architectures for 3-D Medical Image De-noising

Master #01:
An FPGA-based Implementation of Wildlife Surveillance Monitoring Systems

Master #02:
High-performance Low-Injury Bioelectronics Instrumentation for High-jump Athletes

Master #03:
FPGA Implementation of Safe Trajectory Estimation for Autonomous Driving of Unmanned Vehicles using Stereo Vision Depth and Structure from Motion Navigation Techniques

21/01/2016
Success story from our group...Best final year project award - Graduation Day 2015
10/10/2015

Success story from our group...

Best final year project award - Graduation Day 2015

10/10/2015

Come back....

What is actually re-configurable computing (RC) platform?
============================================
Investigate...
- what is actually the following items
- why it is important
- how to use it
- where we can manipulate it?
1. PIC Micro-controller
2. Arduino and its family
3. Raspberry Pi and its family
4. Microprocessor and its family
5. Digital signal processor (DSP) and its family
6. Field programmable gate array (FPGA) and its family
7. Graphical processing unit (GPU) and its family

30/05/2015
 As a dean as well as the head of VASYD, we will meet this coming 1st of June. 3in1 - Motivation, research methodology a...
29/05/2015



As a dean as well as the head of VASYD, we will meet this coming 1st of June.

3in1 - Motivation, research methodology and discussion

Mark your diary!
09/03/2015

Mark your diary!

Profesor Ulung 2014 - Inspiringhttp://youtu.be/l5JVMUegq-w
05/02/2015

Profesor Ulung 2014 - Inspiring

http://youtu.be/l5JVMUegq-w

Profesor Ulung Dr. Harith Ahmad daripada Universiti Malaya merupakan penerima tunggal Anugerah Profesor Ulung bagi tahun 2014. Majlis penganugerahan telah di...

Training for postgraduates, Semester II 2014/2015
01/02/2015

Training for postgraduates, Semester II 2014/2015

What is your thesis structure?
01/02/2015

What is your thesis structure?

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